Advantech PCI-1710 Guía de usuario descargar pdf (Pagina 149)

4.6.9 QCounterConfigSys

Configures the system clock of the digital filter, time period for latching and cascade mode. This

function only supports PCL-833.

Input:

Data type Parameter Description

DevHandle The handler id of the device specified by DevNum as

assigned by the LabVIEW program.

SysClockClock Frequency for digital filter. The value could be set to

SYS8MHZ(0), SYS4MHZ(1), SYS2MHZ(2)

Timebase 16C54 time base control.

TimeDivider Divider control value

Cascade Cascade mode NOCASCADE(0), CASCADE(1)

error in A cluster containing error information, such as the

status, code, and source elements that is passed from

a previous linked VI.

Output:

Data type Parameter Description

DevHandle The handler id of the device specified by DevNum as

assigned by the LabVIEW program.

error out A cluster containing error information. If error in

indicated an error, the status, code, and source

elements of error out have the same values as the

corresponding elements of error in

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Advantech PCI-1710 Guía de usuario Pagina 149