Advantech PCI-1720U Manual de usuario Pagina 5

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v Table of Contents
Contents
Chapter 1 General Information ....................................... 2
1.1 Introduction ................................................................................. 2
1.2 Features........................................................................................ 2
1.3 Applications................................................................................. 3
1.4 Specifications............................................................................... 3
1.5 Block Diagram............................................................................. 4
Chapter 2 Installation ....................................................... 6
2.1 Initial Inspection.......................................................................... 6
2.2 Unpacking.................................................................................... 6
2.3 Installation Instructions ............................................................... 7
Chapter 3 Jumpers and I/O Connectors ....................... 10
Figure 3.1: PCI-1720U Jumper Locations ............................. 10
3.1 Jumper Settings.......................................................................... 10
3.1.1 Using Jumpers to set Current Sink Ranges ............................ 10
Figure 3.2: Jumper Settings for PCI-1720U’s Current Sink
Range ................................................................... 10
3.1.2 Jumper JP5 Setting for the Reset State ................................... 11
Figure 3.3: Jumper JP5 Setting for the Reset State ................ 11
3.2 Connector and Pin Assignments................................................ 12
Figure 3.4: PCI-1720U Pin Assignments ............................... 12
3.2.1 Signal Descriptions of I/O Connector .................................... 13
3.3 Setting the BoardID Switch (SW1) ........................................... 14
Table 3.1: Board ID Setting (SW1) ...................................... 14
3.3.1 Identity Register ..................................................................... 15
Table 3.2: Identity Register of PCI-1720U ........................... 15
Chapter 4 Register Structure and Format.................... 18
4.1 Overview ................................................................................... 18
4.2 I/O Port Address Map................................................................ 19
Table 4.1: PCI-1720U Register Format and Function Descrip-
tion ................................................................... 19
4.2.1 D/A Output Channel 0 to 3 ..................................................... 20
Table 4.2: Register for D/A Data .......................................... 20
4.2.2 D/A Voltage Range and Polarity ............................................ 20
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