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PCI-1720U User Manual 20

4.2.1 D/A Output Channel 0 to 3

The write-only registers of BASE + 2(n) and BASE + (2(n) + 1) accept

data for D/A output channel n (n = 0, 1, 2, 3)

D11 ~ D0 Digital to Analog data. D0 is the LSB (Least Significant Bit)

and D11 is the MSB (Most Significant Bit) of the D/A data.

4.2.2 D/A Voltage Range and Polarity

The read-writable register of BASE + 8 allows users to set the D/A volt-

age range and polarity.)

* n = 0,1,2,3.

Table 4.2: Register for D/A Data

Base

Address

+ decimal

Data

Function

Description

R/W

76543 2 10

+2(n) D7D6D5D4D3 D2 D1D0

D/A output

channel n

+(2(n)+1) D11 D10 D9 D8

Note! To write D/A data, write the low byte first, then

write the high byte.

Table 4.3: Register for D/A Voltage Range and Polarity

Base

Address +

decimal

Data Function

Description

R/W

76543210

+8 DA3_

U/B

DA3_

5/10

DA2_

U/B

DA2_

5/10

DA1_

U/B

DA1_

5/10

DA0

_U/B

DA0_

5/10

D/A voltage

range and

polarity

R/W

Table 4.4: Output Range of D/A Channel n

D An_U/B D An_5/10 D/A channel n output range

0 0 0 to +5 V

0 1 0 to +10 V

1 0 -5 to +5 V

1 1 -10 to +10 V

1 2 ... 21 22 23 24 25 26 27 28 29 30 31 ... 37 38

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