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23 Chapter 3

3.4.5 Interrupt Triggering Edge Control

The interrupt can be triggered by a rising edge or a falling edge of the

interrupt signal, selectable by the value written in the "triggering edge

control" bit in the interrupt control register, as shown in Table 3-4.

3.4.6 Interrupt Flag Bit

The "interrupt flag" bit is a flag indicating the status of an interrupt. It is

a readable and writable bit. Read the bit value to find the status of the

interrupt, write "1" to this bit to clear the interrupt. This bit must be

cleared in the ISR to service the next incoming interrupt.

Table 3.4: Triggering edge control bit values

E0 or E1 Triggering edge of interrupt signal

1 Rising edge trigger

0 Falling edge trigge

Table 3.5: Interrupt flag bit values

F0 & F1 Interrupt status

Read

1 Interrupt exists

0 No interrupt

Write

1 Clear interrupt

0 Don't car

1 2 ... 22 23 24 25 26 27 28 29 30 31 32 ... 37 38

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Advantech PCI-1751U Manual de usuario Pagina 27